www.logiccircuit.org

If you have some state holding circuits in your circuit project like flip-flops you’ve probably noticed that when you turn power on they all flipped to some random state. Of course such flip-flops usually have a reset input and you want to send a reset signal to that input after the power gets on.
But how you can determine the moment when your circuit get powered? Well there is a hack to do this.
It is based on implementation of clock gate. So the clock gate always generates 1 after power turned on. So we can use this in order to catch an initial reset signal. Here is circuit you can use for this purpose. It will generate 1 one cycle of clock right after you turn your project on and then it will flip to 0 indefinitely.

Can we have alternate circuit for power on reset. As it requires one AND Gate in the circuit, there are four logic AND Gates in an IC. We have to use 14pin IC for one AND Gate and we can reduce the layout space by using other small circuit.

circuit card assembly

I am afraid I do not quite understand you. Can you please rephrase you question?

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I designed two or latch, one with or gate, and other one with transistors, but the one i designed with transistors wont work as expected.

I've tried and thought so much time to find bug but I couldn't !!!

Can anyone please tell me if it has a logical problem or "logisim" cause that problem ?

here is the image :

!http://imgur.com/a/B4p36

I used "logisim" app to create these circuits.

Hi,
First of all if you want people see your questions try to create separate topic with clear title instead of adding your question to unrelated topic.
Second this forum mostly related to LogicCircuit program not logisim.
Finally, I am not sure what transistors are meant to be in logisim, but you can try to look at some other schematics like:
https://www.google.com/search?q=or+latc ... ransistors

Regards,
Eugene

To generate a power-on reset signal, use a sensor element and configure it to output a non-repeating series at startup. This is the only way to make a POR in LogicCircuit that does not rely on peculiarities of the underlying simulation engine (To all of my students: do NOT use the circuit shown on top of this thread).

The series specification "0:1 2:0" means "raise the output to 1 at t = 0 and return to zero after two half-cycles (= one clock cycle)"

Thanks for the suggestion. This is indeed much better way to get the reset signal.