www.logiccircuit.org

Eugene,
Thank you so much for fixing the bug in the LogicCircuit program that was causing circuits with large numbers of gates to perform in an incorrect manner. Now my large scale shift register circuits operate correctly. Speaking of circuits, I've found a way to make a shift register that only requires 2 invert functions! However, neither of the 2 invert functions are used for "shifting" the data through the shift register! Also, I've figured out how to combine that shift register with 6 more gates in order to make a JK Flip-Flop from a total of 12 gates! The best part is, the 2 memory units (SR Flip-Flops) of the shift register are constructed in such a way that they always set up their logic states in the exact same way upon turning the power on. It's like a digital logic phenomenon! The secret is that ANDs and ORs are opposites, even though they're the same. Yes, I know that might sound ridiculous, but it's a true statement. I've come up with a formula to explain this fact.

A normal AND gate is what I refer to as a "1s AND = 0s OR"...
A normal OR gate is what I refer to as a "1s OR = 0s AND"...

I hope what I've said here makes sense. I would like to share this new JK Flip-Flop design with you at some point. I've been wondering if it would perform the same way in real life. I've searched the internet for a design that matches it, but I haven't found anything that closely resembles it.

Hello LLAD,

Though you addressed your message to Eugene, I'm so free to react.
The phenomen, you've mentioned isn't that particulary. It is known as positive logic and negative logic.

In positive logic, you look at the "ones" in the truth table, in negative logic you look at the "zero's".

A B F
0 0 0
0 1 0
1 0 0
1 1 1

When you look at the "ones", the function is true (=1), when both inputs are true (=1)
When you look at he "zero's", the function is true (=0), when, one input, or the other, or both are true (=0)
This truth-table is valid for an AND-gate in positive logic, but is also valid for an OR-gate in negative logic.


You can do the same with the table below
A B F
0 0 0
0 1 1
1 0 1
1 1 1

When you look at the "ones", the function is true (=1), when one input, or the other, or both are true (=1). When you look at the "zero's", the function is true
(=0), when both inputs are true (=0).

So, you're right. An AND-gate is also an OR-gate and the other way around, but only in different ways of thinking.

You've made me curious, when you talk about your shift-registers and certainly when I read your story about the "LED Word Sequencer".
You also mentioned the Flip-Flop, with a defined state at startup.
It doesn't happen to be a combination of an AND-gate, an OR-gate and an inverter?

Is a JK-FF particular, when it has 12 gates, for I designed one with eight gates.
So I really wanna know, what you've found. I like to learn something.

Best Regards
Hans Cadans

Hans Cadans,
To answer your question about an AND, an OR, and an Inverter (NOT)...Yes, the Flip-Flops I've designed are made from the 3 basic gate functions (NOT-AND-OR and NOT-OR-AND).

About the D Flip-Flops:
Notice that these "D Flip-Flops" have the ability to allow signals to pass through the "Enable" input under certain circumstances (this would be useful for allowing these D Flip-Flops to indicate when their memory is in a specific state). Because of this, data could be stored elsewhere when the memory is considered to be full (0 or 1, depending upon design). As can be seen, there are 2 possible designs...but ANDs and ORs switch places with each design. Also, the "Enable" feature works opposite with each design. The "Data" inputs, however, function exactly the same for both designs (data is always inverted).
By combining both D Flip-Flop designs, a "Shift Register" is able to be designed...and by adding an inverter to that shift register, a "T Flip-Flop" is able to be designed. As for the "JK Flip-Flop", I plan on posting it soon...but I'd like to see if anyone can figure out how I designed it before I post it. I will give you a clue, though...this JK Flip-Flop is a modified version of the T Flip-Flop...and it only contains 5 additional gates...1 of those gates is an inverter...another gate has 3 inputs...the remaining gates are only 2 input.

Hello LLAD,

I've just returned from my vacation in France.
Just before I did leave, I read your answer and your challenge (in my opinion)
So I took a pen and a lot of paper with me, trying to find your solution.

After several days (sitting in the sunlight), I found several solutions, but all off them with 6 additional gates.
It drove me almost mad. But.... suddenly, I saw the light (not the sunlight).
In the attached file, you will find my solutions.

I've also read your article about the LED WORD SEQUENCER. It is obvious, that you are a rookie in electronics.
That is not bad, and it seems to me, that you are a free mind (I hope this is a good expression)
You use the wrong nomenclature, but such kind of circuits are not used for this problem.
However, you did a tremendous job, by decoding the Keys with a hard wired solution. A hell of a job.

A simple bi-stable circuit is called a LATCH. When SET and RESET-inputs only can work DURING the presence of another signal
it is still called a LATCH (this signal enables the SET- and RESET-inputs). This type is called a GATED LATCH.
When SET- and RESET-inputs work at the transition of an other signal (edge triggered), then it is called a FlipFlop.

Your design of the DATA-FF is very good, because you used a low-active-latch and a high-active-latch,
and therefore the Clock-Signal has no inverter. (both latches have the same signal)
In practice, I often use the same type of LATCH, to make a FlipFlop, (because then I need the same type of I.C-s., all NAND-s)

The latches, themselves, aren't so good, because the SETUP-time for the SET- and RESET-inputs aren't equal.
See also the explanation in the attached file.
The type of LATCH, you've chosen (AND, OR, NOT) is not usual.
In the attached file, you will also find the experiments, that I've done.
I think, that your Shift-Register has some strange behaviour, maybe these properties can be used for a special purpose.

Hans Cadans