www.logiccircuit.org

Hello all,
it's been years since my last post here, hope that all of you are well and healthy with this new virus wandering around.

And now, i will present you my last working (hopefully) 16 bit, 6502 inspired (No, no indirect zero page, yet at least) processor:
https://github.com/aleferri/6516 ...

C3 and C4 have the same values (812) and the two 12 bit comparators output 1 to the set command of the latches q3 and q4 when C is 812.
Why you say it is unexpected?

I don't know where to post it, but i found a little error inside Fusion universal assembler (good work by the way, really useful tool), Fusion just crash when you use "dir\file" format because it tries to parse as escape character instead of subdirectory. The correct format is "dir/file", i patched ...

Ok, you're right.
Hope to see the ALU soon

Thanks for unlocking the thread,
Instead of a separated CMP opcode you can add arithmetics instructions that only set flags and discard result.
To implement them, you can force a register to be zero (many risc cpu do this). For example add 0, r0, r1 will set flags but the result will be discarded ...

There are 2 cpu in the attachments.
VerySimpleCPU is an implementation of VerySimpleCPU of course, so it have 4 instruction: add, and, jmp and sta, 2 bit opcodes and 6 bit address.
It is uselessy overcomplicated, but i was in the beginning of the course of Logic Circuits when i started.

The other ...