To everybody, who’s interested
To understand this complex design, I’ve divided the whole circuit into several little circuits.
I will upload this circuits from time to time, (hopefully every two or three weeks).
You’ll get an explanation within every circuit. Then you can give any comments, suggestions
and/or improvements.
To avoid wasting time, in figuring out how stuff works, we all have to use the same basic circuits.
Therefore I’ll also upload my library. This library contains the most basic circuits.
If you feel, this library is not complete enough, I will update it, with your suggestion c.q. improvement. If you upload your suggestions/improvements, you have to document them well, in such a way, that everybody can understand the new item.
At first I will show you the Architecture. To make you understand, in a easy way, all the possibilities of this design, I've attached
PowerPoint Presentation. This presentation shows you the DataPath for the different instructions. The instructions IN and OUT are left away intentionally.
Also a WORD-document is added to explain the different slides.
This Architecture will be the startng-point for our design. If you have suggestions/questions, feel free to make/ask them.
Next time I will present you the ALU.
Hans Cadans
Computer Architecture
-
Hans Cadans
- Posts: 57
- Joined: Thu Apr 24, 2014 12:30 pm
Computer Architecture
- Attachments
-
- Load-Store Machine.ppt
- (389 KiB) Downloaded 2791 times
-
- Topic.doc
- (27 KiB) Downloaded 2478 times
Re: Computer Architecture
Thanks for unlocking the thread,
Instead of a separated CMP opcode you can add arithmetics instructions that only set flags and discard result.
To implement them, you can force a register to be zero (many risc cpu do this). For example add 0, r0, r1 will set flags but the result will be discarded.
Forcing a register to be zero also can be used to implement a move -> add r0, 0, r1 is equals at mov r0, r1.
Alessio
Instead of a separated CMP opcode you can add arithmetics instructions that only set flags and discard result.
To implement them, you can force a register to be zero (many risc cpu do this). For example add 0, r0, r1 will set flags but the result will be discarded.
Forcing a register to be zero also can be used to implement a move -> add r0, 0, r1 is equals at mov r0, r1.
Alessio
-
Hans Cadans
- Posts: 57
- Joined: Thu Apr 24, 2014 12:30 pm
Re: Computer Architecture
Hi Alessio,
All you've said, is very true. But I suggest, that we discuss these items at a later moment.
After we have finished the hardware, we can pick up the discussion again.
For the readability it is better, in my opinion, to use: mov r1, r2 instead of add r1,r2,0
And it's the same for CMP r,r2 instead of add 0,r1,r2.
Thanks for your suggestions. We will discuss them certainly.
Then we will decide, what we're going to do.
I hope, you will agree with me.
Hans Cadans
All you've said, is very true. But I suggest, that we discuss these items at a later moment.
After we have finished the hardware, we can pick up the discussion again.
For the readability it is better, in my opinion, to use: mov r1, r2 instead of add r1,r2,0
And it's the same for CMP r,r2 instead of add 0,r1,r2.
Thanks for your suggestions. We will discuss them certainly.
Then we will decide, what we're going to do.
I hope, you will agree with me.
Hans Cadans
Re: Computer Architecture
Ok, you're right.
Hope to see the ALU soon
Hope to see the ALU soon