Would somebody please be good enough to have a look at the attached circuit.
I am aware that the 'NEW REGISTER' sub circuit has an 8 bit connector at the top AND at the bottom. This is intentional as it will be required to have data traveling in either direction through it. The tri-state circuity has been replaced by direct connecting wires for simplicity.
1. All the LEDs should be lit up in the order 10001111.
2. The five 'NEW REGISTER' circuits have to be inspected in order starting with the top-most for their LEDS to lit up correctly. Clicking on them starting at the bottom shows NON working LEDS until the top most is inspected, at which point they light up correctly.
3. Most of the LEDS on the MAIN circuit refuse to light up for some reason.
Would someone be able to explain what I'm doing wrong please.
Thanks in advance
LED/Split Pin problems
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- Posts: 2
- Joined: Tue Oct 09, 2012 1:45 pm
LED/Split Pin problems
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- My Logic Project_TEST.CircuitProject
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Re: LED/Split Pin problems
Hi,
Thanks for using Logic Circuit. You actually found pretty good problem and a bug.
Can you please explain why do you need data to flow in both directions through it? I want to better understand your scenario to know how to resolve the problem mentioned above.
So let me start with the problem explanation. All pins in the program are either input or output, they were never been designed to let data goes both ways. In real life chips producers are trying to minimize number of pins, so they combining input with output and using tri state buffers for control direction of the data flow. Here on the other hand it is very easy to add as many pins as you want, and so there will be not much value of combining input and output. That is why such design decision was made.
The bug is that with current design the connection problem is not detected.
So for current workaround you will need to have separate input and output pins for both data flows.
For resolving the problem and fixing bug I need to better understand your original intent.
Thanks,
Eugene
Thanks for using Logic Circuit. You actually found pretty good problem and a bug.
Can you please explain why do you need data to flow in both directions through it? I want to better understand your scenario to know how to resolve the problem mentioned above.
So let me start with the problem explanation. All pins in the program are either input or output, they were never been designed to let data goes both ways. In real life chips producers are trying to minimize number of pins, so they combining input with output and using tri state buffers for control direction of the data flow. Here on the other hand it is very easy to add as many pins as you want, and so there will be not much value of combining input and output. That is why such design decision was made.
The bug is that with current design the connection problem is not detected.
So for current workaround you will need to have separate input and output pins for both data flows.
For resolving the problem and fixing bug I need to better understand your original intent.
Thanks,
Eugene
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- Posts: 2
- Joined: Tue Oct 09, 2012 1:45 pm
Re: LED/Split Pin problems
Thank you for such a quick reply.
Your answer explains very clearly why my circuit refuses to operate as I expected.
The attached circuit is work in progress but will hopefully give you some idea of what I have been trying to do.
The CPU I have been working on will have...
2 databuses
3 general registers A,B,C
Register X, either holds a simple number OR an address
Program Counter
No control logic has been designed yet.
In some situations the circuit can use both databuses at the same time.
Example ONE:-
Transfer number 11001001 from the top into register A
<step 1>
Set switch 1 to allow data DOWN
Set switch 2 to allow data DOWN
Set Register A to allow data IN.
<step 2>Turn off all switches and stop Register A accepting data
<done>
Example TWO:-
Copy contents of register A into register B
<step 1>
Set Register A to allow data OUT
Set switch 2 to allow data UP
Set Switch 4 to allow data DOWN
Set Register B to allow data IN
<step 2> Turn off all switches and stop Register A sending data and stop Register B accepting data
<done>
Example THREE:-
Use the ALU to store the result of Register A plus Register B, then move result from the ALU into Register C
<step 1>
Set switch 9 to allow data DOWN
Set switch 2 to allow data UP
Set Register A to allow data OUT
Set switch 8 to allow data DOWN
Set switch 5 to allow data DOWN
Set Register B to allow data OUT
<step 2>
Latch data into ALU
<step 3>
Turn switch 8 off
Turn switch 9 off
Stop Register A sending data
Stop Register B sending data
Activate ALU
<step 4>
Set switch 10 to allow data DOWN
Set switch 7 to allow data UP
Set Register C to allow data IN
<step 5>
Turn off all switches and stop Register C accepting data
<done>
Hope the above makes sense.
I will now be able to redesign my circuit taking your answer into account.
Thank you very much for your time and I would also like to thank you for a brilliant program.
Regards Graham
Your answer explains very clearly why my circuit refuses to operate as I expected.
The attached circuit is work in progress but will hopefully give you some idea of what I have been trying to do.
The CPU I have been working on will have...
2 databuses
3 general registers A,B,C
Register X, either holds a simple number OR an address
Program Counter
No control logic has been designed yet.
In some situations the circuit can use both databuses at the same time.
Example ONE:-
Transfer number 11001001 from the top into register A
<step 1>
Set switch 1 to allow data DOWN
Set switch 2 to allow data DOWN
Set Register A to allow data IN.
<step 2>Turn off all switches and stop Register A accepting data
<done>
Example TWO:-
Copy contents of register A into register B
<step 1>
Set Register A to allow data OUT
Set switch 2 to allow data UP
Set Switch 4 to allow data DOWN
Set Register B to allow data IN
<step 2> Turn off all switches and stop Register A sending data and stop Register B accepting data
<done>
Example THREE:-
Use the ALU to store the result of Register A plus Register B, then move result from the ALU into Register C
<step 1>
Set switch 9 to allow data DOWN
Set switch 2 to allow data UP
Set Register A to allow data OUT
Set switch 8 to allow data DOWN
Set switch 5 to allow data DOWN
Set Register B to allow data OUT
<step 2>
Latch data into ALU
<step 3>
Turn switch 8 off
Turn switch 9 off
Stop Register A sending data
Stop Register B sending data
Activate ALU
<step 4>
Set switch 10 to allow data DOWN
Set switch 7 to allow data UP
Set Register C to allow data IN
<step 5>
Turn off all switches and stop Register C accepting data
<done>
Hope the above makes sense.
I will now be able to redesign my circuit taking your answer into account.
Thank you very much for your time and I would also like to thank you for a brilliant program.
Regards Graham
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- My Logic Project_Example Of Project.CircuitProject
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